Question
Digital Logic Design-CS302
Design an 8-bit serial in/serial out shift register and write anABEL input file to implement it using GAL16V8s.
Answers
Dear...An 8-Bit Serial In/serial Out Shift Register:An 8-bit shift register in which the data are enteredserially. When the Enable input to the AND gate is HIGH, the dataare clocked into the left-mostflip-flop and then shifted from leftto right. The Qout is the output. The Clear input isactive-LOW and resets all of the flip-flops (Q = 0)independent ofthe clock.
Implementing the Shift Register with a PLDThe shift register inputs and outputs are assigned to pins onthe GAL22V10 as shown in Figure below. Since the D input of thefirst flip-flop comes fromthe AND gate, the output of the firstflip-flop, Q0, is expressed as the following ABEL registeredequation:
Q0 := Data &Enable;Since the Q output of each flip-flop is connected to the Dinput of the next flip-flop, the remaining flip-flop outputs areexpressed as follows:Q1 := Q0;
Q2 := Q1;
Q3 := Q2;
Q4 := Q3;
Q5 := Q4;
Q6 := Q5;
Q7 := Q6;Developing the ABEL Input File :
Recall that an ABEL input file module typically contains threeparts: declarations, logic descriptions, and test vectors. In theinput file for the 8-bitshift register, the declarations sectionmakes the pin assignments for the inputs and outputs.
The equations section expresses the output logic equations,utilizing the set notation. For the Clock equation, the dotextension .CLK specifies theclock input for each of the flip-flopsassociated with the specified outputs. For the Clear equation, thedot extension .AR specifies an asynchronousreset for each of theflip-flops associated with the specified outputs.Entries in the test vectors section consist of numeric values,the special constant .c. that is used to indicate the clock pulse,and .x. that indicatesa "don't care". Recall that test vectors areused to test the PLD to make sure that it works as expected whenprogrammed. The ABEL input file is asfollows:Module Eight_bit_shift_register
Title ‘8-bit shift register in a GAL22V10’“Device DeclarationRegister device ‘P22V10’“Pin DeclarationClock,ClearPin 1,2;Data,EnablePin 3,4;Q0Pin23I hope itis useful toyou.